Hardware Architecture for Asynchronous Cellular Self-Organizing Maps

Nowadays, one of the main challenges in computer architectures is scalability; indeed, novel processor can include thousands processing elements on a single chip and using them efficiently remains big issue. An interesting source inspiration for handling scalability mammalian brain different works neuromorphic computation have attempted to address this question. The Self-configurable 3D Cellular Adaptive Platform (SCALP) has been designed with goal prototyping such types systems led proposal Self-Organizing Maps (CSOM) algorithm. In paper, we present hardware architecture CSOM form interconnected neural units specific property supporting an asynchronous deployment multi-FPGA array. Asynchronous (ACSOM) algorithm exploits underlying Network-on-Chip structure be provided by SCALP order overcome multi-path propagation issue presented straightforward implementation. We explore its behaviour under map topologies scalar representations. results suggest that larger network size low precision coding obtains optimal ratio between accuracy FPGA resources.